In accordance with recent technical developments, various types of personal computers (PCs), such as desktop, tower and notebook types, have been developed and are being sold on the market. In these PCs, various controller chips, including a host CPU and other components, such as a memory and peripheral devices, are interconnected by a common signal transfer path called a "bus". The bus is implemented in the form of an expansion slot on a system board, and various expansion adapter cards can be loaded into the expansion slot.
The standardization of buses has had a great effect on the computer field. System board makers and expansion adapter card vendors can manufacture and sell products that conform to standard bus specifications, and more users can easily upgrade PCs by expanding their peripheral environments.
Conventionally, the ISA (Industry Standard Architecture), which have been well known, and the specifications for its bus architecture were employed as a standard. The ISA bus, based on a bus adopted for the IBM PC/AT ("PC/AT" is a trademark of IBM Corporation) was designed for the CPU chip 80286 produced by Intel Corp. In its basic configuration, the ISA bus has a bus width of 16 bits, an operating clock of 8 MHz, and a maximum data transfer speed of 4 MBps. The ISA bus is one of the bus architectures which have been most popularly employed, and various expansion boards, peripheral devices and software components (e.g., OS, BIOS, applications) are available that are compatible with it, such that they can be connected and correctly operated on the ISA bus. That is, the ISA is a legacy bus architecture that has inherited much from the past.
Lately, however, powerful CPUs, such as the i486 and the Pentium produced by Intel Corp. and the "PowerPC 6xx" ("PowerPC" is a trademark of IBM Corporation) jointly developed by IBM Corporation and others, whose operating clocks exceed 100 MHz have been developed and are being widely employed. Accordingly, the ISA bus, which has a narrow bus width and a low data transfer speed, cannot adequately accomodate the performance of the high-speed CPU. Further, sub-systems/expansion boards have operated for systems, such as graphics or full motion video sub-systems, SCSI (Small Computer System Interface) storage sub-systems and network systems, for which fast data transfer is required. The data input/output performance of the ISA bus is not adequate for these sub-systems.
In this situation, several bus architectures have been proposed and developed that support the upgraded CPUs and sub-systems. One of these architectures is the PCI (Peripheral Component Interconnect). Originally, the draft specifications for the PCI bus were prepared in 1991 by Intel Corp., and currently, the standardization and the distribution of the PCI bus are being performed by SIG (Special Interest Group) members. In its basic configuration, the PCI bus has a bus width of 32 bits, an operating clock of 33 MHz, and a maximum data transfer speed of 132 MBps. For the PCI, an address and data are multiplexed. An address line and a data line do not have to be separated, so that the number of signals required for the PCI bus is reduced to about half that required for other bus environments, and the number of connection pins required for devices that support the PCI bus connection is also reduced. In addition, for the PCI, the PIO (Programmable I/O transfer) that a CPU performs for the data transfer and the bus master transfer that a device (a master device) on a PCI bus controls when the bus performs the data transfer are defined. Details of the structure of the PCI bus architecture and of its operation are described in "PCI Local Bus Specification, Revision 2.0" (Copyright 1992, 1993) and "PCI to PCI Bridge Architecture Specification, Revision 1.0, 1994" (original issue).
The features of the PCI bus will now be detailed: